The present invention relates to a semiconductor device and, more particularly, to an internal voltage generating circuit of semiconductor device.
Currently, the semiconductor device generally includes an internal voltage generating circuit for generating an internal voltage, the level of which is typically lower than an external power voltage. For example, the internal voltage generating circuit in a semiconductor memory device such as EDO DRAM reduces 3.3 V external power voltage to 2.8 V internal power voltage.
However, due to deviation in the fabrication process, the voltage level of the internal voltage generating circuit of semiconductor device may not be the desired voltage level. For repairing these defects in a test stage of such a semiconductor device, there has been proposed a fuse programmable internal voltage generating circuit.
FIG. 1 is a block diagram for illustrating a general internal voltage generating circuit of semiconductor device, which is programmable.
Referring to FIG. 1, the internal voltage generating circuit 100 comprises a reference voltage generator 200, a fuse programmable control signal generator 300, a voltage level trimming unit 400 and an internal voltage driver 500 and the generated internal power voltage Vint is applied to an internal circuit 600.
The reference voltage generator 200 generates a predetermined level of reference voltage Vr1 irrespective of the change of temperature and/or the change of external power voltage, so as to apply the Vr1 to the voltage level trimming unit 400.
The fuse programmable control signal generator 300 includes a plurality of fuses, which are programmed (this means that the fuses are selectively cut) at test stage. Thus, according to the programmed fuse state, one of the multiple control signals S is active. The voltage level trimming unit 400 trims the level of the reference voltage Vr1 so as to apply its output Vr2 to the internal voltage driver 500. At this time, the degree of trimming depends on the multiple control signal S. The internal voltage driver 500 generates the internal power voltage Vint for driving the internal circuit 600, based on the voltage Vr2. That is, the output voltage Vr2 of the voltage level trimming unit 400 can be controlled by suitably programming(e.g. selectively cutting) the fuses included in the fuse programmable control signal generator 300 and the level of the internal power voltage Vint can be controlled in turn.
The test for the semiconductor device having such a fuse programmable internal voltage generating circuit as this must be performed as follows. First, the level of the internal power voltage Vint is measured in a test equipment. Then, the semiconductor device must be carried to a repair equipment and then the fuses included in the internal voltage generating circuit are selectively cut in the repair equipment so as to trim the internal power voltage Vint. After the internal power voltage Vint is trimmed, the semiconductor device must be carried back to the test equipment, so as to pre-test the function of the semiconductor device to determine, for example, whether the memory operation such as data read/write cycle is ordinarily performed or not in the semiconductor memory device. If any defect exists, the semiconductor device is carried to the repair equipment again so that the fuses included in the function blocks of the semiconductor device may be selectively cut for repairing. This repair, for example, includes the repair for row and column repairs in a semiconductor device. After the repair for the function block in semiconductor device is finished, the semiconductor device is carried to the test equipment once again in order to perform the post-test.
As shown, the semiconductor device including the general internal voltage generating circuit has problems in that the semiconductor device must be carried to and from the test equipment and the repair equipment repeatedly and in turn the time for test & repair is needlessly long and the manufacturing process is also needlessly troublesome.